Datasheet4U Logo Datasheet4U.com

EBE11UD8AGSA - 1GB DDR2 SDRAM SO-DIMM

Datasheet Summary

Description

The EBE11UD8AGSA is 128M words × 64 bits, 2 ranks DDR2 SDRAM Small Outline Dual In-line Memory Module, mounting 16 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA) package.

Read and write operations are performed at the cross points of the CK and the /CK.

Features

  • 200-pin socket type small outline dual in line memory module (SO-DIMM)  PCB height: 30.0mm  Lead pitch: 0.6mm  Lead-free (RoHS compliant).
  • Power supply: VDD = 1.8V ± 0.1V.
  • Data rate: 667Mbps/533Mbps (max. ).
  • SSTL_18 compatible I/O.
  • Double-data-rate architecture: two data transfers per clock cycle.
  • Bi-directional, differential data strobe (DQS and /DQS) is transmitted/received with data, to be used in capturing data at the receiver.

📥 Download Datasheet

Datasheet preview – EBE11UD8AGSA

Datasheet Details

Part number EBE11UD8AGSA
Manufacturer Elpida Memory
File Size 244.01 KB
Description 1GB DDR2 SDRAM SO-DIMM
Datasheet download datasheet EBE11UD8AGSA Datasheet
Additional preview pages of the EBE11UD8AGSA datasheet.

📁 Similar Datasheet

Other Datasheets by Elpida Memory

Full PDF Text Transcription

Click to expand full text
DATA SHEET www.DataSheet4U.com 1GB DDR2 SDRAM SO-DIMM EBE11UD8AGSA (128M words × 64 bits, 2 Ranks) Description The EBE11UD8AGSA is 128M words × 64 bits, 2 ranks DDR2 SDRAM Small Outline Dual In-line Memory Module, mounting 16 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA) package. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer is realized by the 4 bits prefetch-pipelined architecture. Data strobe (DQS and /DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. This module provides high density mounting without utilizing surface mount technology.
Published: |