EDE1108AJBG - 1G bits DDR2 SDRAM

Elpida Memory

Key Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

EDE1108AJBG 1g bits ddr2 sdram by Elpida Memory - Datasheet Preview

Datasheet Details

Part number	EDE1108AJBG
Manufacturer	Elpida Memory
File Size	537.89 KB
Description	1G bits DDR2 SDRAM
Datasheet	EDE1108AJBG Datasheet

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Other Datasheets by Elpida Memory

Part Number	Description
EDE1108AJBG-8E-F	1G bits DDR2 SDRAM
EDE1108AASE	(EDE1104AASE / EDE1108AASE) 1G bits DDR2 SDRAM organized
EDE1104AASE	(EDE1104AASE / EDE1108AASE) 1G bits DDR2 SDRAM organized
EDE1116AJBG	1G bits DDR2 SDRAM
EDE1116AJBG-8E-F	1G bits DDR2 SDRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATA SHEET 1G bits DDR2 SDRAM EDE1108AJBG (128M words × 8 bits) EDE1116AJBG (64M words × 16 bits) Specifications • Density: 1G bits • Organization  16M words × 8 bits × 8 banks (EDE1108AJBG)  8M words × 16 bits × 8 banks (EDE1116AJBG) • Package  60-ball FBGA (EDE1108AJBG)  84-ball FBGA (EDE1116AJBG)  Lead-free (RoHS compliant) and Halogen-free • Power supply: VDD, VDDQ = 1.8V ± 0.1V • Data rate  800Mbps (max.