EM48AM3284LBB Overview
The EM48AM3284LBB is Mobile Synchronous Dynamic Random Access Memory (SDRAM) organized as 4Meg words x 4 banks by 32 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 512Mb Mobile SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 1.8V low power memory system.
EM48AM3284LBB Key Features
- Fully Synchronous to Positive Clock Edge
- VDD= 1.7V~1.95V for 133MHz & 166MHz Power Supply
- LVCMOS patible with Multiplexed Address
- Programmable Burst Length (B/L)
- 1, 2, 4, 8
- Programmable CAS Latency (C/L)
- Data Mask (DQM) for Read / Write Masking
- Programmable Wrap Sequence
- Sequential (B/L = 1/2/4/8/full Page)
- Interleave (B/L = 1/2/4/8)