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EM48AM3284LBB - 512Mb (4M x 4Bank x 32) Mobile Synchronous DRAM

Description

The EM48AM3284LBB is Mobile Synchronous Dynamic Random Access Memory (SDRAM) organized as 4Meg words x 4 banks by 32 bits.

All inputs and outputs are synchronized with the positive edge of the clock.

Features

  • Fully Synchronous to Positive Clock Edge.
  • VDD= 1.7V~1.95V for 133MHz & 166MHz Power Supply.
  • LVCMOS Compatible with Multiplexed Address.
  • Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page.
  • Programmable CAS Latency (C/L) - 3.
  • Data Mask (DQM) for Read / Write Masking.
  • Programmable Wrap Sequence.
  • Sequential (B/L = 1/2/4/8/full Page).
  • Interleave (B/L = 1/2/4/8).
  • Burst Read with Single-bit Write Operation.

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Datasheet Details

Part number EM48AM3284LBB
Manufacturer Eorex
File Size 263.91 KB
Description 512Mb (4M x 4Bank x 32) Mobile Synchronous DRAM
Datasheet download datasheet EM48AM3284LBB Datasheet

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Full PDF Text Transcription

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Revision History Revision 0.1 (May. 2010) - First release. Revision 0.2 (Sep. 2010) - Delete CL=2 parameters - Input Leakage Current = -2μA ~ +2μA - Change Supply Voltage Rating = -0.5 ~ +2.3 - Delete Deep Power Down Mode - Change AC timing paramters: tRC & tIS Revision 0.3 (Nov. 2010) - Change clock input capacitance value EM48AM3284LBB Nov. 2010 www.eorex.com 1/22 EM48AM3284LBB 512Mb (4M×4Bank×32) Mobile Synchronous DRAM Features • Fully Synchronous to Positive Clock Edge • VDD= 1.7V~1.
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