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EM48BM1684LBC - 512Mb Mobile Synchronous DRAM

Description

The EM48BM1684LBC is Mobile Synchronous Dynamic Random Access Memory (SDRAM) organized as 8Meg words x 4 banks by 16 bits.

All inputs and outputs are synchronized with the positive edge of the clock.

Features

  • Fully Synchronous to Positive Clock Edge.
  • VDD= 1.7 ~1.95V for 133/166MHz Power Supply.
  • LVCMOS Compatible with Multiplexed Address.
  • Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page.
  • Programmable CAS Latency (C/L) - 3.
  • Data Mask (DQM) for Read / Write Masking.
  • Programmable Wrap Sequence.
  • Sequential (B/L = 1/2/4/8/full Page).
  • Interleave (B/L = 1/2/4/8).
  • Burst Read with Single-bit Write Operation.

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Datasheet Details

Part number EM48BM1684LBC
Manufacturer Eorex
File Size 799.03 KB
Description 512Mb Mobile Synchronous DRAM
Datasheet download datasheet EM48BM1684LBC Datasheet

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Full PDF Text Transcription

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Revision History Revision 0.1 (Jun. 2012) - First release. EM48BM1684LBC Jun. 2012 www.eorex.com 1/20 EM48BM1684LBC 512Mb (8M4Bank16) Mobile Synchronous DRAM Features • Fully Synchronous to Positive Clock Edge • VDD= 1.7 ~1.95V for 133/166MHz Power Supply • LVCMOS Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page • Programmable CAS Latency (C/L) - 3 • Data Mask (DQM) for Read / Write Masking • Programmable Wrap Sequence – Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) • Burst Read with Single-bit Write Operation • All Inputs are sampled at the Rising Edge of the System Clock • Auto Refresh and Self Refresh • 8,192 Refresh Cycles / 64ms (7.
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