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APRIL 2006
PRELIMINARY
XRK69773
REV. P1.0.0
1:12 LVCMOS PLL CLOCK GENERATOR
GENERAL DESCRIPTION
The XRK69773 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications. The XRK69773 can select between one of three reference inputs and provides 14 LVCMOS outputs -12 outputs (3 banks of 4) for clock distribution, 1 for feedback and 1 for synchronization. The XRK69773 is a highly flexible device. It has 3 selectable inputs, (one differential and two single-ended inputs) to support system clock redundancy. Up to three different clock frequencys can be generated and outputted on the three output banks. Switching the internal reference clock is controlled by the control input, CLK_SEL.