XRK69774 Datasheet | Exar

.. APRIL 2006 PRELIMINARY REV. P1.0.1 1:14 LVCMOS PLL CLOCK GENERATOR GENERAL DESCRIPTION The XRK69774 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications. The XRK69774 can select between one of two reference inputs and provides 15 LVCMOS outputs 14 outputs (2 banks of 5 and 1 bank of 4) for clock distribution and 1 for feedback. The XRK69774 has two LVCMOS inputs to support clock redundancy. Switching the internal reference clock is controlled by the control input, CLK_SEL. The XRK69774 uses PLL technology to frequency lock its outputs to the input reference clock. The divider in the feedback path...