XRK32309 Overview
FUNCTIONAL DESCRIPTION Offered in both 16 pin SOIC and TSSOP packages, XRK32309 is a low cost 3.3V zero delay buffer. It is designed to distribute high speed clocks by taking one reference input and driving nine output clocks. The feedback of its on-chip PLL is internally connected to the FB output.
XRK32309 Key Features
- 10-MHz to 120-MHz operating range, patible
- Zero input-output propagation delay
- Multiple low-skew outputs
- Output-output skew less than 250 ps Device-device skew less than 700 ps One input drives nine outputs, grouped as 4 + 4+
- Test Mode to bypass phase-locked loop (PLL) (see
- Available in space-saving 16-pin 150-mil SOIC or
- 3.3V operation
- Industrial and mercial temperature available
- (510) 668-7000
- FAX (510) 668-7017
XRK32309 Applications
- 10-MHz to 120-MHz operating range, patible