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P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐20V
D
RDSON (MAX.)
100mΩ
ID
‐3.4A
G
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Bottom View
S DD
SD
GD D
PIN 1
SYMBOL
EMFA0P02VAT
LIMITS
UNIT
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
VGS ID IDM PD Tj, Tstg
TYPICAL
±12 ‐3.4 ‐2.4 ‐13.6 2.08 1.
EMFA0P02VAT Datasheet
