| Part number | 74F113 |
|---|---|
| Datasheet | 74F113_FairchildSemiconductor.pdf |
| File Size | 59.84 KB |
| Manufacturer | Fairchild (now onsemi) |
| Description | Dual JK Negative Edge-Triggered Flip-Flop |
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The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as long as minimum setup and hold times are observed.
| Brand Logo | Part Number | Description | Other Manufacturers |
|---|---|---|---|
 |
74F113 | Dual J-K negative edge-triggered flip-flops | NXP |
See all Fairchild (now onsemi) datasheets
| Part Number | Description |
|---|---|
| 74F11 | Triple 3-Input AND Gate |
| 74F112 | Dual JK Negative Edge-Triggered Flip-Flop |
| 74F114 | Dual JK Negative Edge-Triggered Flip-Flop |
| 74F10 | Triple 3-Input NAND Gate |
| 74F1056 | 8-Bit Schottky Barrier Diode Array |
| 74F1071 | 18-Bit Undershoot/Overshoot Clamp |
| 74F109 | Dual JK Positive Edge-Triggered Flip-Flop |
| 74F125 | Quad Buffer |
| 74F132 | Quad 2-Input NAND Schmitt Trigger |
| 74F138 | 1-of-8 Decoder/Demultiplexer |
