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74F114 - Dual JK Negative Edge-Triggered Flip-Flop

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Datasheet preview – 74F114

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Part number 74F114
Manufacturer Fairchild Semiconductor
File Size 55.22 KB
Description Dual JK Negative Edge-Triggered Flip-Flop
Datasheet download datasheet 74F114 Datasheet
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Description

The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs.

Synchronous state changes are initiated by the falling edge of the clock.

Triggering occurs at a voltage level of the clock and is not directly related to the transition time.

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