Datasheet Details
| Part number | 74F112 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 666.05 KB |
| Description | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP |
| Datasheet | 74F112-etcTI.pdf |
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Overview: SN74F112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SDFS048A – D2932, MARCH 1987 – REVISED OCTOBER 1993 • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil.
| Part number | 74F112 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 666.05 KB |
| Description | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP |
| Datasheet | 74F112-etcTI.pdf |
|
|
|
The SN74F112 contains two independent J-K negative-edge-triggered flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs.
When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements is transferred to the outputs on the negative-going edge of the clock pulse.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
 |
74F112 | Dual J-K negative edge-triggered flip-flop | NXP |
 |
74F112 | Dual JK Negative Edge-Triggered Flip-Flop | Fairchild Semiconductor |
| Part Number | Description |
|---|---|
| 74F11 | Triple 3-Input AND Gate |
| 74F10 | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| 74F109 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP |
| 74F138 | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| 74F153 | DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS |
| 74F157A | Quad 2-Input Multiplexer |
| 74F158A | Quadruple 2-Line To 1-Line Data Selectors/Multiplexers |
| 74F161A | SYNCHRONOUS 4-BIT BINARY COUNTER |
| 74F175 | Quad D-Type Flip-Flop |
| 74F20 | DUAL 4-INPUT POSITIVE-NAND GATES |