Datasheet4U Logo Datasheet4U.com

74F112 - Dual JK Negative Edge-Triggered Flip-Flop

Product Overview

📥 Download Datasheet

Datasheet preview – 74F112

Datasheet Details

Part number 74F112
Manufacturer Fairchild Semiconductor
File Size 59.08 KB
Description Dual JK Negative Edge-Triggered Flip-Flop
Datasheet download datasheet 74F112 Datasheet
Additional preview pages of the 74F112 datasheet.

Product details

Description

The 74F112 contains two independent, high-speed JK flipflops with Direct Set and Clear inputs.

📁 Similar Datasheet

  • 74F11 - Triple 3-Input AND Gate (National Semiconductor)
  • 74F113 - Dual J-K negative edge-triggered flip-flops (NXP)
  • 74F10 - Triple 3-input NAND gate (NXP)
  • 74F109 - Dual JK Positive Edge-Triggered Flip-Flop (National Semiconductor)
  • 74F1240 - Octal inverter buffer (NXP)
  • 74F1241 - Octal inverter buffer (NXP)
  • 74F1244 - Octal buffer (NXP)
  • 74F1245 - Octal transceiver (NXP)
Other Datasheets by Fairchild Semiconductor
  • 74F114 - Dual JK Negative Edge-Triggered Flip-Flop
  • 74F1056 - 8-Bit Schottky Barrier Diode Array
  • 74F1071 - 18-Bit Undershoot/Overshoot Clamp
  • 74F125 - Quad Buffer
  • 74F132 - Quad 2-Input NAND Schmitt Trigger
  • 74F138 - 1-of-8 Decoder/Demultiplexer
Published: |