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NDB603AL - N-Channel MOSFET

General Description

These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is especially tailored to minimize on-state resistance.

Key Features

  • 25A, 30V. RDS(ON) = 0.022Ω @ VGS=10V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. High density cell design for extremely low RDS(ON). 175°C maximum junction temperature rating. ______________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VGSS ID Parameter Drain-Source Voltage T C = 25°C unless otherw.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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January 1996 NDP603AL / NDB603AL N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features 25A, 30V. RDS(ON) = 0.022Ω @ VGS=10V. Critical DC electrical parameters specified at elevated temperature.