Description
These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
Features
- -2.7A, -20V. RDS(ON) = 0.14Ω @ VGS = -4.5V RDS(ON) = 0.2Ω @ VGS = -2.7V. Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. ___________________________________________________________________________________________
4
3
5
2
6
1
SuperSOT -6
TM
Absolute Maximum Ratings
Symbol Parameter VDSS VGSS ID PD Drain-Source.
NDC632 Datasheet
