Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
Features
- -3.4A, -30V. RDS(ON) = 0.13Ω @ VGS = -10V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Rugged and reliable. ________________________________________________________________________________
5 6
4 3
7
8
2
1
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation
T A= 25°C unless otherwise noted
ND.