Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
Features
- -3.0A, -60V. RDS(ON) = 0.15Ω @ VGS =-10V
R DS(ON) = 0.24Ω @ VGS =-4.5V. High density cell design for extremely low R DS(ON). High power and current handling capability in a widely used surface mount package. _______________________________________________________________________________________
5 6 7 8
4 3 2 1
Absolute Maximum Ratings
Symbol
VDSS VGSS ID
TA = 25°C unless otherwise noted
Parameter
Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous TA = 25°C TA = 70°C TA =.