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MM912_634 - Integrated S12 Based Relay Driver

Datasheet Summary

Description

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11 Electrical Ch

Features

  • 16-Bit S12 CPU, 64/48 kByte P-FLASH,.
  • 6.0 kByte RAM; 4/2 kByte D-FLASH.
  • Background debug (BDM) & debug module (DBG).
  • Die to Die bus interface for transparent memory mapping.
  • On-chip oscillator & two independent watchdogs.
  • www. DataSheet4U. net LIN 2.1 Physical Layer Interface with integrated SCI.
  • 10 digital MCU GPIOs shared with SPI (PA7…0, PE1…0).
  • 10-Bit, 15 Channel - Analog to Digital Converter (ADC).
  • 16-Bit, 4 Chan.

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Datasheet Details

Part number MM912_634
Manufacturer Freescale Semiconductor
File Size 5.21 MB
Description Integrated S12 Based Relay Driver
Datasheet download datasheet MM912_634 Datasheet
Additional preview pages of the MM912_634 datasheet.

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Freescale Semiconductor Advance Information Document Number: MM912_634D1 Rev. 4.0, 5/2011 Integrated S12 Based Relay Driver with LIN The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated single package solutions that integrates an HCS12 microcontroller with a SMARTMOS analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application specific functions, including a LIN transceiver. Features • 16-Bit S12 CPU, 64/48 kByte P-FLASH, • 6.0 kByte RAM; 4/2 kByte D-FLASH • Background debug (BDM) & debug module (DBG) • Die to Die bus interface for transparent memory mapping • On-chip oscillator & two independent watchdogs •www.DataSheet4U.net LIN 2.
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