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29F002 - 2M (256K X 8) BIT

General Description

The MBM29F002TC/BC is a 2 M-bit, 5.0 V-Only Flash memory organized as 256K bytes of 8 bits each.

The MBM29F002TC/BC is offered in a 32-pin TSOP(I) and 32-pin PLCC packages.

This device is designed to be programmed in-system with the standard system 5.0 V VCC supply.

Key Features

  • Single 5.0 V read, write, and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection 32-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) 32-pin PLCC (Package Suffix: PD) Minimum 100,000 write/erase cycles High performance 55 ns maximum access time Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and.

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Datasheet Details

Part number 29F002
Manufacturer Fujitsu Media Devices Limited
File Size 461.15 KB
Description 2M (256K X 8) BIT
Datasheet download datasheet 29F002 Datasheet

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Other Datasheets by Fujitsu Media Devices Limited

Part Number Description
29F800 8M (1M X 8/512K X 16) BIT

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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FUJITSU SEMICONDUCTOR DATA SHEET DS05-20868-3E FLASH MEMORY CMOS 2M (256K × 8) BIT MBM29F002TC-55/-70/-90/MBM29F002BC-55/-70/-90 s FEATURES • • Single 5.0 V read, write, and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection 32-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) 32-pin PLCC (Package Suffix: PD) Minimum 100,000 write/erase cycles High performance 55 ns maximum access time Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes Any combination of sectors can be erased.