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MBM29SL160BD - 16M (2M x 8/1M x 16) BIT FLASH MEMORY

Download the MBM29SL160BD datasheet PDF. This datasheet also covers the MBM29SL160TD variant, as both devices belong to the same 16m (2m x 8/1m x 16) bit flash memory family and are provided as variant models within a single manufacturer datasheet.

General Description

The MBM29SL160TD/BD are a 16M-bit, 1.8 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each.

The MBM29SL160TD/BD are offered in a 48-pin TSOP(I) and 48-ball FBGA Package.

These devices are designed to be programmed in-system with the standard system 1.8 V VCC supply.

Key Features

  • Single 1.8 V read, program, and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type) 48-ball FBGA (Package suffix: PBT).
  • Minimum 100,000 program/erase cycles.
  • High performance 100 ns maximum access time.
  • Sector erase ar.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MBM29SL160TD_FujitsuMediaDevices.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20877-1E FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT MBM29SL160TD-10/-12/MBM29SL160BD-10/-12 s FEATURES • Single 1.8 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • Minimum 100,000 program/erase cycles • High performance 100 ns maximum access time • Sector erase architecture Eight 4K word and thirty one 32K word sectors in word mode Eight 8K byte and thirty one 64K byte sectors in byte mode Any combination of sectors can be concurrently erased. Also supports full chip erase.