GS8321E18E-V Datasheet PDF (36Mb Sync Burst SRAMs) | Download GSI Technology GS8321E18E-V

GS8321E18E-V - 36Mb Sync Burst SRAMs

Description

Applications The GS8321E18/32/36E-xxxV is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter.

Features

FT pin for user-configurable flow through or pipeline operation.
Dual Cycle Deselect (DCD) operation.
IEEE 1149.1 JTAG-compatible Boundary Scan.
1.8 V or 2.5 V core power supply.
1.8 V or 2.5 V I/O supply.
LBO pin for Linear or Interleaved Burst mode.
Internal input resistors on mode pins allow floating mode pins.
Default to Interleaved Pipeline mode.
Byte Write (BW) and/or Global Write (GW) operation.
Int.

Datasheet Details

Part number	GS8321E18E-V
Manufacturer	GSI Technology
File Size	724.12 KB
Description	36Mb Sync Burst SRAMs
Datasheet	GS8321E18E-V Datasheet
Additional preview pages of the GS8321E18E-V datasheet.

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Full PDF Text Transcription

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GS8321E18/32/36E-xxxV 165-Bump FP-BGA Commercial Temp Industrial Temp 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 250 MHz–133 MHz 1.8 V or 2.5 V VDD 1.8 V or 2.5 V I/O Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 1.8 V or 2.5 V core power supply • 1.8 V or 2.

Published: Oct 14, 2016 |