GS84118T Overview
The GS84118 is a 256K x 18 high performance synchronous SRAM with integrated Tag RAM parator. A 2-bit burst counter is included to provide burst interface with PentiumTM and other high performance CPUs. It is designed to be used as a Cache Tag SRAM, as well as data SRAM.
GS84118T Key Features
- 3.3 V +10%/-5% core power supply, 2.5 V or 3.3 V I/O supply
- Intergrated data parator for Tag RAM application
- FT mode pin for flow through or pipeline operation
- LBO pin for Linear or Interleave (PentiumTM and X86) Burst mode
- Synchronous address, data I/O, and control inputs
- Synchronous Data Enable (DE)
- Asynchronous Output Enable (OE)
- Asynchronous Match Output Enable (MOE)
- Byte Write (BWE) and Global Write (GW) operation
- Three chip enable signals for easy depth expansion