HD74HCT138 Overview
The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine which one of the eight normally high outputs will go low. Two active low and one active high enables (G1, G2A and G2B) are provided to ease the cascading of decoders.
HD74HCT138 Key Features
- LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (A, B, C to Y) = 18.5 ns
- 4.4 4.13
- Input current Quiescent supply current Iin I CC
- AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
- G2A or G2B to output G1 to output A, B or C to output
- 0.05 0°
- 0.22 ± 0.05 0.20 ± 0.04
- 8° 0.70 ± 0.20
- Conforms 0.24 g
- Dimension including the plating thickness Base material dimension