HM624100H Overview
The HM624100H is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed and high density memory, such as cache and buffer memory in system.
HM624100H Key Features
- Single 5.0 V supply : 5.0 V ± 10 %
- Access time 10/12/15 ns (max)
- pletely static memory No clock or timing strobe required
- Equal access and cycle times
- Directly TTL patible All inputs and outputs
- Operating current : 200/180/160 mA (max)
- TTL standby current : 70/60/50 mA (max)
- CMOS standby ccurrent : 5 mA (max) : 1.2 mA (max) (L-version)
- Data retension current : 0.8 mA (max) (L-version)
- Data retension voltage : 2.0 V (min) (L-version)