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HY57V161610D-I - 2 Banks x 512K x 16 Bit Synchronous DRAM

General Description

THE Hynix HY57V161610D is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the Mobile applications which require low power consumption and industrial temperature range.

HY57V161610D is organized as 2banks of 524,288x16.

Key Features

  • Single 3.0V to 3.6V power supplyNote1).
  • Auto refresh and self refresh.
  • All device pins are compatible with LVTTL interface.
  • 4096 refresh cycles / 64ms.
  • JEDEC standard 400mil 50pin TSOP-II with 0.8mm of pin pitch.
  • All inputs and outputs referenced to positive edge of system clock.
  • Data mask function by UDQM/LDQM.
  • Programmable Burst Length and Burst Type - 1, 2, 4, 8 and Full Page for Sequence Burst - 1, 2, 4 and 8 for I.

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Datasheet Details

Part number HY57V161610D-I
Manufacturer SK Hynix
File Size 161.62 KB
Description 2 Banks x 512K x 16 Bit Synchronous DRAM
Datasheet download datasheet HY57V161610D-I Datasheet

Full PDF Text Transcription for HY57V161610D-I (Reference)

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HY57V161610D-I 2 Banks x 512K x 16 Bit Synchronous DRAM DESCRIPTION THE Hynix HY57V161610D is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the Mobile appli...

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77,216-bits CMOS Synchronous DRAM, ideally suited for the Mobile applications which require low power consumption and industrial temperature range. HY57V161610D is organized as 2banks of 524,288x16. HY57V161610D is offering fully synchronous operation referenced to a positive edge clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.

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