HY5W6B6DLF Overview
and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied.
HY5W6B6DLF Key Features
- Power Supply Voltage : VDD = 2.5V, VDDQ = 2.5V LVCMOS patible I/O Interface Low Voltage interface to reduce I/O power Lo
- PASR(Partial Array Self Refresh)
- AUTO TCSR (Temperature pensated Self Refresh)
- DS (Drive Strength)
- Deep Power Down Mode Programmable CAS latency of 1, 2 or 3 Package Type : 54ball, 0.8mm pitch FBGA (Lead Free, Lead)
- ORDERING INFORMATION