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8SLVD2104 - LVDS Output Fanout Buffer

General Description

The 8SLVD2104 is a high-performance differential dual 1:4 LVDS fanout buffer.

The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

The 8SLVD2104 is characterized to operate from a 2.5V power supply.

Key Features

  • Two 1:4, low skew, low additive jitter LVDS fanout buffers.
  • Two differential clock inputs.
  • Differential pairs can accept the following differential input levels: LVDS and LVPECL.
  • Maximum in.

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Datasheet Details

Part number 8SLVD2104
Manufacturer IDT
File Size 318.72 KB
Description LVDS Output Fanout Buffer
Datasheet download datasheet 8SLVD2104 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Dual 1:4, LVDS Output Fanout Buffer 8SLVD2104 DATA SHEET General Description The 8SLVD2104 is a high-performance differential dual 1:4 LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVD2104 is characterized to operate from a 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVD2104 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two independent buffers with four low skew outputs each are available. The integrated bias voltage generators enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.