Datasheet Details
| Part number | IDT71V65702 |
|---|---|
| Manufacturer | IDT |
| File Size | 520.57 KB |
| Description | (IDT71V65702 / IDT71V65902) Synchronous ZBT SRAMs |
| Datasheet |
 IDT71V65702 Datasheet
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General Description
The IDT71V65702/5902 are 3.3V high-speed 9,437,184-bit (9 Megabit) synchronous SRAMs organized as 256K x 36 / 512K x 18.
They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads.
Key Features
- 256K x 36, 512K x 18 memory configurations Supports high performance system speed - 100 MHz (7.5 ns Clock-to-Data Access) ZBTTM Feature - No dead cycles between write and read cycles Internally synchronized output buffer enable eliminates the need to control OE Single R/W (READ/WRITE) control pin 4-word burst capability (Interleaved or linear) Individual byte write (BW1-BW4) control (May tie active) Three chip enables for simple depth expansion 3.3V power supply (±5%) 2.5V (±5%) I/O Supply (VDD.