IS42S16400C Description
The 64Mb SDRAM is a high speed CMOS, dynamic random-access memory designed to operate in 3.3V memory systems containing 67,108,864 bits. Internally configured as a quad-bank DRAM with a synchronous interface. Each 16,777,216-bit bank is organized as 4,096 rows by 256 columns by 16 bits.
IS42S16400C Key Features
- Clock frequency: 166, 133 MHz a organized as 1,048,576 bits x 16-bit x 4-bank for improved D
- Fully . synchronous; all signals referenced to a performance. The synchronous DRAMs achieve high-speed positive w clock
- w- Single 3.3V power supply
- LVTTL interface
- Programmable burst length
- (1, 2, 4, 8, full page)
- Programmable burst sequence: Sequential/Interleave
- Self refresh modes
- 4096 refresh cycles every 64 ms
- Random column address every clock cycle