Datasheet4U Logo Datasheet4U.com

IS61NLF12836A - (IS61NVFxxxxxA) STATE BUS SRAM

Download the IS61NLF12836A datasheet PDF. This datasheet also covers the IS61NVF12836A variant, as both devices belong to the same (is61nvfxxxxxa) state bus sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The 4 Meg 'NLF/NVF' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications.

Key Features

  • www. DataSheet4U. com ISSI ®.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS61NVF12836A_ISSI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
IS61NLF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM Integrated Silicon Solution
IS61NLF25632 SRAM Integrated Silicon Solution Inc
IS61NLF25636 SRAM Integrated Silicon Solution Inc
IS61NLF409618B FLOW THROUGH (NO WAIT) STATE BUS SRAM Integrated Silicon Solution
IS61NLF51218 SRAM Integrated Silicon Solution Inc

Other Datasheets by ISSI (now Infineon)

Part Number Description
IS61NLF102418 STATE BUS SRAM
IS61NLF102436A 36Mb STATE BUS SRAM
IS61NLF204818A 36Mb STATE BUS SRAM
IS61NLF25618A (IS61NVFxxxxxA) STATE BUS SRAM
IS61NLF25636A (IS61NVFxxxxxA) STATE BUS SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 128K x 36 and 256K x 18 4Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM FEATURES www.DataSheet4U.com ISSI ® PRELIMINARY INFORMATION SEPTEMBER 2005 DESCRIPTION The 4 Meg 'NLF/NVF' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications. They are organized as 128K words by 36 bits and 256K words by 18 bits, fabricated with ISSI's advanced CMOS technology. Incorporating a 'no wait' state feature, wait cycles are eliminated when the bus switches from read to write, or write to read.