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IS61NLP6432A - (IS61NVPxxxxxA) STATE BUS SRAM

This page provides the datasheet information for the IS61NLP6432A, a member of the IS61NVP12818A (IS61NVPxxxxxA) STATE BUS SRAM family.

Datasheet Summary

Description

The 2 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications.

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Datasheet Details

Part number IS61NLP6432A
Manufacturer ISSI
File Size 176.91 KB
Description (IS61NVPxxxxxA) STATE BUS SRAM
Datasheet download datasheet IS61NLP6432A Datasheet
Additional preview pages of the IS61NLP6432A datasheet.

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Full PDF Text Transcription

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IS61NLP6432A IS61NLP6436A/IS61NVP6436A IS61NLP12818A/IS61NVP12818A 64K x 32, 64K x 36, and 128K x 18 2Mb, PIPELINE 'NO WAIT' STATE BUS SRAM ISSI SEPTEMBER 2005 ® PRELIMINARY INFORMATION FEATURES www.DataSheet4U.com DESCRIPTION The 2 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications. They are organized as 64K words by 32 bits, 64K words by 36 bits, and 128K words by 18 bits, fabricated with ISSI's advanced CMOS technology. Incorporating a 'no wait' state feature, wait cycles are eliminated when the bus switches from read to write, or write to read.
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