IS61QDP2B41M36A Datasheet PDF - ISSI 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM Specs

IS61QDP2B41M36A - 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM

This page provides the datasheet information for the IS61QDP2B41M36A, a member of the IS61QDP2B42M18A 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM family.

Datasheet Summary

Description

The 36Mb IS61QDP2B41M36A/A1/A2 and IS61QDP2B42M18A/A1/A2 are synchronous, highperformance CMOS static random access memory (SRAM) devices.

These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.

Features

1Mx36 and 2Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipeline read with late write operation.
Double Data Rate (DDR) interface for read and write input ports.
2.0 cycle read latency.
Fixed 4-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and contr.

Datasheet Details

Part number	IS61QDP2B41M36A
Manufacturer	ISSI
File Size	645.20 KB
Description	36Mb QUADP (Burst 4) SYNCHRONOUS SRAM
Datasheet	IS61QDP2B41M36A Datasheet
Additional preview pages of the IS61QDP2B41M36A datasheet.

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Full PDF Text Transcription

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IS61QDP2B42M18A/A1/A2 IS61QDP2B41M36A/A1/A2 2Mx18, 1Mx36 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.0 Cycle Read Latency) JANUARY 2015 FEATURES  1Mx36 and 2Mx18 configuration available.  On-chip Delay-Locked Loop (DLL) for wide data valid window.  Separate independent read and write ports with concurrent read and write operations.  Synchronous pipeline read with late write operation.  Double Data Rate (DDR) interface for read and write input ports.  2.0 cycle read latency.  Fixed 4-bit burst for read and write operations.  Clock stop support.  Two input clocks (K and K#) for address and control registering at rising edges only.  Two echo clocks (CQ and CQ#) that are delivered simultaneously with data.  Data Valid Pin (QVLD).  +1.8V core power supply and 1.5, 1.

Published: Jun 10, 2016 |