IS61WV12824 Datasheet | ISSI

128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY SEPTEMBER 2020 Features - High-speed access time: 8, 10 ns - High-performance, low-power CMOS process - TTL patible interface levels - Single power supply VDD 3.3V ± 5% for 8ns VDD 2.4V to 3.6V for 10ns - Fully static operation: no clock or refresh required - Three state outputs - Available in 119-pin Ball Grid Array (BGA) package - Industrial temperature available - Lead-free available DESCRIPTION The ISSI IS61WV12824 is a high-speed, static RAM organized as 131,072 words by 24 bits. It is fabricated using ISSI's high- performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with low power consumption. When CE1 is HIGH and CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE1, CE2 and OE.The active LOWWrite Enable (WE) controls both writing and reading of the memory. The IS61WV12824 is packaged in the JEDEC standard 119-pin BGA. FUNCTIONAL BLOCK DIAGRAM A0-A16 VCC GND I/O0-I/O23 DECODER I/O DATA CIRCUIT 128K x 24 MEMORY ARRAY COLUMN I/O CE2 CE1 OE WE CONTROL CIRCUIT Copyright © 2020 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not remend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the...