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ICS8305I - MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

Description

The ICS8305I is a low skew, 1-to-4, Differential/ LVCMOS-to-LVCMOS/LVTTL Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8305I has selectable clock inputs that accept either differential or single ended input levels.

Features

  • 4 LVCMOS/LVTTL outputs.
  • Selectable differential or LVCMOS/LVTTL clock inputs.
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL.
  • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL.
  • Maximum output frequency: 350MHz.
  • Output skew: 40ps (maximum).
  • Part-to-part skew: 700ps (maximum).
  • Additive phase jitter, RMS: 0.04ps (typical).
  • 3.3V core, 3.3V, 2.5V or 1.8V ou.

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Datasheet preview – ICS8305I

Datasheet Details

Part number ICS8305I
Manufacturer Integrated Circuit Systems
File Size 250.87 KB
Description MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER
Datasheet download datasheet ICS8305I Datasheet
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Integrated Circuit Systems, Inc. ICS8305I LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER FEATURES • 4 LVCMOS/LVTTL outputs • Selectable differential or LVCMOS/LVTTL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequency: 350MHz • Output skew: 40ps (maximum) • Part-to-part skew: 700ps (maximum) • Additive phase jitter, RMS: 0.04ps (typical) • 3.3V core, 3.3V, 2.5V or 1.
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