ICSSSTV16857 datasheet by Integrated Circuit Systems.
| Part number | ICSSSTV16857 |
|---|---|
| Datasheet | ICSSSTV16857_IntegratedCircuitSystems.pdf |
| File Size | 114.68 KB |
| Manufacturer | Integrated Circuit Systems |
| Description | DDR 14-Bit Registered Buffer |
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The 14-bit ICSSTV16857 is a universal bus driver designed for 2.3V to 2.7V VDD operation and SSTL_2 I/O Levels except for the RESET# input which is LVCMOS. Data flow from D to Q is controlled by the differential clock, CLK, CLK# and RESET#. Data is triggered on the positive edge of CLK.
View all Integrated Circuit Systems datasheets
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|---|---|
| ICSSSTV16859 | DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV32852 | DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTVA16857 | DDR 14-Bit Registered Buffer |
| ICSSSTVA16859B | DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTVF16859 | DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTUF32864A | 25-Bit Configurable Registered Buffer for DDR2 |
| ICS1522 | User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator |
| ICS1523 | High-Performance Programmable Line-Locked Clock Generator |
| ICS1524 | Dual Output Phase Controlled SSTL-3/PECL Clock Generator |
| ICS1526 | Video Clock Synthesizer |
