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IDT5V2528 - 2.5V / 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER

Datasheet Summary

Description

The IDT5V2528 is a high performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.

It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.

Features

  • Operates at 3.3V VDD/AVDD and 2.5V/3.3V VDDQ.
  • 1:10 fanout.
  • 3-level inputs for output control.
  • External feedback (FBIN) pin is used to synchronize the outputs to the clock input signal.
  • No external RC network required for PLL loop stability.
  • Configurable 2.5V or 3.3V LVTTL outputs.
  • tPD Phase Error at 100MHz to 166MHz: ±150ps.
  • Jitter (peak-to-peak) at 133MHz and 166MHz: ±75ps.
  • Spread spectrum compatible.
  • Op.

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Datasheet preview – IDT5V2528

Datasheet Details

Part number IDT5V2528
Manufacturer Integrated Device
File Size 58.65 KB
Description 2.5V / 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
Datasheet download datasheet IDT5V2528 Datasheet
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Full PDF Text Transcription

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IDT5V2528/A 2.5 / 3.3V PHASE-LOCK LOOP CLOCK DRIVER 2.5V / 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER INDUSTRIALTEMPERATURERANGE IDT5V2528/A FEATURES: • Operates at 3.3V VDD/AVDD and 2.5V/3.3V VDDQ • 1:10 fanout • 3-level inputs for output control • External feedback (FBIN) pin is used to synchronize the outputs to the clock input signal • No external RC network required for PLL loop stability • Configurable 2.5V or 3.3V LVTTL outputs • tPD Phase Error at 100MHz to 166MHz: ±150ps • Jitter (peak-to-peak) at 133MHz and 166MHz: ±75ps • Spread spectrum compatible • Operating Frequency: − Std: 25MHz to 140MHz − A: 25MHz to 167MHz • Available in TSSOP package DESCRIPTION: The IDT5V2528 is a high performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.
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