IDT5V993A Datasheet | Integrated Device

IDT5V993A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK MERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK™ Features : - - - - - - - - Ref input is 5V tolerant 3 pairs of programmable skew outputs Low skew: 200ps same pair, 250ps all outputs Selectable positive or negative edge synchronization: Excellent for DSP applications Synchronous output enable Output frequency: 3.75MHz to 85MHz 2x, 4x, 1/2, and 1/4 outputs 3 skew grades: IDT5V993A-2: t SKEW0<250ps IDT5V993A-5: t SKEW0<500ps IDT5V993A-7: t SKEW0<750ps 3-level inputs for skew and PLL range control PLL bypass for DC testing External feedback, internal loop filter 12m A balanced drive outputs Low Jitter: <200ps peak-to-peak Available in QSOP package DESCRIPTION: The IDT5V993A is a high fanout 3.3V PLL based clock driver intended for high performance puting and data-munications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The IDT5V993A has six programmable skew outputs and two zero skew outputs. Skew is controlled by 3-level input signals that may be hard-wired to appropriate HIGH-MID-LOW levels. When the GND/s OE pin is held low, all the outputs are synchronously enabled. However, if GND/s OE is held high, all the outputs except 3Q0 and 3Q1 are synchronously disabled. Furthermore, when the VCCQ/PE is held high, all the outputs are synchronized with the positive edge of the REF clock input. When VCCQ/ PE is held low, all the outputs are synchronized with the negative edge of REF. Both devices have LVTTL outputs with 12m A balanced drive outputs. - - - - - - FUNCTIONAL BLOCK DIAGRAM GND/s O E Skew Select 3 3 1F1:0 V CCQ /PE Skew Select REF PLL FB 3 FS Skew Select 3 3 3F1:0 3 3 2F1:0 1Q 0 1Q 1 2Q 0 2Q 1 3Q 0 3Q 1 4Q 0 4Q 1 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 c 2001 Integrated Device...