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IS41LV16100A - 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

General Description

The ISSI IS41LV16100A is 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories.

These devices offer an accelerated cycle access called EDO Page Mode.

EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word.

Key Features

  • TTL compatible inputs and outputs; tristate I/O.
  • Refresh Interval:.
  • Auto refresh Mode: 1,024 cycles /16 ms.
  • RAS-Only, CAS-before-RAS (CBR), and Hidden.
  • JEDEC standard pinout.
  • Single power supply:.
  • 3.3V ± 10% (IS41LV16100A).
  • Byte Write and Byte Read operation via two CAS.
  • Industrial Temperature Range: -40oC to +85oC.
  • Lead-free available www. DataSheet4U. com ISSI MARCH 2005 ®.

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Other Datasheets by ISSI (now Infineon)

Part Number Description
IS41LV16100 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16100B 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16100S 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16105 1M x 16 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
IS41LV16105B 1M x 16 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS41LV16100A 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE FEATURES • TTL compatible inputs and outputs; tristate I/O • Refresh Interval: — Auto refresh Mode: 1,024 cycles /16 ms — RAS-Only, CAS-before-RAS (CBR), and Hidden • JEDEC standard pinout • Single power supply: — 3.3V ± 10% (IS41LV16100A) • Byte Write and Byte Read operation via two CAS • Industrial Temperature Range: -40oC to +85oC • Lead-free available www.DataSheet4U.com ISSI MARCH 2005 ® DESCRIPTION The ISSI IS41LV16100A is 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word.