IRG4CC71KB Datasheet | International Rectifier

Description Collector-to-Emitter Saturation Voltage Colletor-to-Emitter Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Collector Current Gate-to-Emitter Leakage Current Guaranteed (Min/Max) 1.7V Max. 600V Min. 3.0V Min., 6.5V Max. 300 µA Max. ± 1.1 µA Max. Test Conditions IC = 10A, TJ = 25°C, VGE = 15V TJ = 25°C, ICES = 250µA, VGE = 0V VGE = VCE , TJ =25°C, IC =250µA TJ = 25°C, VCE = 600V TJ = 25°C, VGE = +/- 20V Mechanical Data Nominal Backmetal position, Thickness: Nominal Front Metal position, Thickness: Dimensions: Wafer Diameter: Wafer thickness: Relevant Die Mechanical Dwg. Number01-5271 Minimum Street Width Reject Ink Dot Size Ink Dot Location Remended Storage Environment: Remended Die Attach Conditions Reference Standard IR packaged part ( for design ) : IRG4PSC71K Cr-Ni V-Ag ( 1k A-2k A-.2.5k A ) 99% Al, 1% Si (4 microns) 0.305" x 0.390" 150mm, with std. < 100 > flat .015" + / -.003" 100 Microns 0.25mm Diameter Minimum Consistent throughout same wafer lot Store in original container, in dessicated nitrogen, with no contamination For optimum electrical results, die attach temperature should not exceed 300C Die Outline .irf. 11/28/05 Additional Testing and Screening For Customers requiring product supplied as Known Good Die (KGD) or requiring specific die level testing, please contact your local IR Sales. Shipping Three shipping options are offered as standard. - Un-sawn wafer - Die in waffle pack - Die on film Tape and Reel is also available for some products. Please consult your local IR sales office or email http:/ /die.irf. for additional information. Please specify your required shipping option when requesting prices and ordering Die product. If not specified, Un-sawn wafer will be assumed. Handling - - - Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as defined in MIL-HDBK-263. Product must be handled only in a class 10,000 or better-designated clean room...