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ACS11MS - Radiation Hardened Triple 3-Input AND Gate

General Description

only.

Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.

Accordingly, the reader is cautioned to verify that data sheets are current before placing orders.

Key Features

  • QML Qualified Per MIL-PRF-38535 Requirements.
  • 1.25 Micron Radiation Hardened SOS CMOS.
  • Radiation Environment - Latch-Up Free Under any Conditions - Total Dose.
  • . . 3 x 105 RAD (Si) - SEU Immunity.
  • . . . 100MeV/(mg/cm2).
  • Input Logic Levels . . . . VIL = (0.3)(VCC), VIH = (0.7)(VCC).
  • Output Current.
  • .

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ACS11MS Data Sheet November 1998 File Number 4543 Radiation Hardened Triple 3-Input AND Gate The Radiation Hardened ACS11MS is a Triple 3-Input AND Gate. When all three inputs to one of the gates are at a HIGH level, the corresponding Y output will be HIGH. A LOW level on any input will cause the output for that gate to be LOW. All inputs are buffered and the outputs are designed for balanced propagation delay and transition times. The ACS11MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer significant power reduction and faster performance when compared to ALSTTL types.