CD4073BMS Datasheet | Intersil

CD4073BMS, CD4081BMS CD4082BMS January 1993 CMOS AND Gate Pinout CD4073BMS TOP VIEW Features - High-Voltage Types (20V Rating) - CD4073BMS Triple 3-Input AND Gate - CD4081BMS Quad 2-Input AND Gate - CD4082BMS Dual 4-Input AND Gate - Medium Speed Operation: - t PLH, t PHL = 60ns (typ) at VDD = 10V - 100% Tested for Quiescent Current at 20V - Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100n A at 18V and +25o C - Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V - Standardized Symmetrical Output Characteristics - 5V, 10V and 15V Parametric Ratings A 1 B 2 D 3 E 4 F 5 K=D- E- F 6 VSS 7 14 VDD 13 G 12 H 11 I 10 L = G - H - I 9 J=A- B- C 8 C CD4081BMS TOP VIEW A 1 14 VDD 13 H 12 G 11 M = G - H 10 L = E - F 9 F 8 E - Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS...