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HSP43124 Datasheet Serial I/o Filter

Manufacturer: Intersil (now Renesas)

Overview: HSP43124 Data Sheet May 1999 File Number 3555.6 Serial I/O Filter The Serial I/O Filter is a high performance filter engine that is ideal for off loading the burden of filter processing from a DSP microprocessor. It supports a variety of multistage filter configurations based on a user programmable filter and fixed coefficient halfband filters. These configurations include a programmable FIR filter of up to 256 taps, a cascade of from one to five halfband filters, or a cascade of halfband filters followed by a programmable FIR. The half band filters each decimate by a factor of two, and the FIR filter decimates from one to eight. When all six filters are selected, a maximum decimation of 256 is provided. For digital tuning applications, a separate multiplier is provided which allows the ining data stream to be multiplied, or mixed, by a user supplied mix factor. A two pin interface is provided for serially loading the mix factor from an external source or selecting the mix factor from an onboard ROM. The on-board ROM contains samples of a sinusoid capable of spectrally shifting the input data by one quarter of the sample rate, FS/4. This allows the chip to function as a digital down converter when the filter stages are configured as a low-pass filter. The serial interface for3- input and output data is patible with the serial ports of mon DSP microprocessors. Coefficients and configuration data are loaded over a bidirectional eight bit interface.

Key Features

  • 45MHz Clock Rate.
  • 256 Tap Programmable FIR Filter.
  • 24-Bit Data, 32-Bit Coefficients.
  • Cascade of up to 5 Half Band Filters.
  • Decimation from 1 to 256.
  • Two Pin Interface for Down Conversion by FS/4.
  • Multiplier for Mixing or Scaling Input with an External Source.
  • Serial I/O Compatible with Most DSP Microprocessors.

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