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HSP43168 - Dual FIR Filter

Download the HSP43168 datasheet PDF. This datasheet also covers the HSP variant, as both devices belong to the same dual fir filter family and are provided as variant models within a single manufacturer datasheet.

General Description

SYMBOL VCC GND CIN0-9 A0-8 I I TYPE VCC: +5V power supply pin.

Ground.

Control/Coefficient Data Bus.

Key Features

  • Two Independent 8-Tap FIR Filters Configurable as a Single 16-Tap FIR.
  • 10-Bit Data and Coefficients.
  • On-Board Storage for 32 Programmable Coefficient Sets.
  • Up To: 256 FIR Taps, 16 x 16 2-D Kernels, or 10 x 19-Bit Data and Coefficients.
  • Programmable Decimation to 16.
  • Programmable Rounding on Output.
  • Standard Microprocessor Interface.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HSP-431.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HSP43168 Data Sheet November 1999 File Number 2808.8 Dual FIR Filter The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR cells each fed by a separate coefficient bank and one of two separate inputs. The outputs of the FIR cells are either summed or multiplexed by the MUX/Adder. The compute power in the FIR Cells can be configured to provide quadrature filtering, complex filtering, 2-D convolution, 1-D/2-D correlations, and interpolating/decimating filters. The FIR cells take advantage of symmetry in FIR coefficients by pre-adding data samples prior to multiplication.