KK74HC4060A Datasheet | Kodenshi AUK Group

14 STAGE BINARY COUNTER/OSCILLATOR The KK74HC4060A is an high speed CMOS 14-STAGE BINARY COUNTER/OSCILLATOR fabricated with silicon gate C2MOS technology. The oscillator configuration allows design of either RC or crystal oscillator circuits. A high level on the CLEAR acplishes the reset function, i.e. all counter outputs are made low and the oscillator is disabled. A negative transition on the clock input increments the counter. Ten kinds of divided output are provided; 4 to 10 and 12 to 14 stage inclusive. The maximum division available at Q12 is 1/16384 f oscillator. The Clock Input ( ∅I ) and the CLEAR input are equipped with protection circuits against static discharge and transient excess voltage. o o o o . LOW POWER DISSIPATION: ICC =4 µA(MAX.) at TA=25°C SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 m A (MIN) BALANCED PROPAGATION DELAYS: t PLH = t PHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2 V to 6 V ORDERING INFORMATION KK74HC4060AN Plastic KK74HC4060ADW SOIC TA = -55° to 125° C for all packages PIN DESCRIPTION PIN No 01, 02, 03 07, 05, 04, 06, 14, 13, 15 09 10 11 12 08 16 SYMBOL Q12 to Q14 Q4 to Q10 NAME AND FUNCTION Counter Outputs Counter Outputs External Capacitor Connection External Resistor Connection Clock Input / Oscillator Master Reset Ground (0V) Positive Supply Voltage PIN ASSIGNMENT ∅O ∅O ∅I CLEAR GND VCC CLEAR ∅I ∅O ∅O INPUT AND OUTPUT EQUIVALENT CIRCUIT VCC VCC INPUT OUTPUT ..net TRUTH TABLE ∅I X CLEAR H L L X : Don’t Care FUNCTION COUNTER IS RESET TO ZERO STATE ∅O OUTPUT GOES TO HIGH LEVEL ∅O OUTPUT GOES TO LOW LEVEL COUNT UP ONE STEP NO CHANGE LOGIC DIAGRAM Q4 7 ∅I 11 ∅O 10 ∅O 9 D CK CLEAR 12 R Q D CK R Q D CK R Q D CK R Q D CK R Q Q5 5 R CK D R CK D R CK D R CK...