Datasheet4U Logo Datasheet4U.com

LMU18 - 16 x 16-bit Parallel Multiplier

General Description

The LMU18 is a high-speed, low power 16-bit parallel multiplier.

The LMU18 is an 84-pin device which provides simultaneous access to all outputs.

The LMU18 produces the 32-bit product of two 16-bit numbers.

Key Features

  • u 35 ns Worst-Case Multiply Time u Low Power CMOS Technology u Full 32-bit Output Port.
  • No Multiplexing Required u Two’s Complement, Unsigned, or Mixed Operands u Three-State Outputs u 84-pin PLCC, J-Lead LMU18 BLOCK.

📥 Download Datasheet

Datasheet Details

Part number LMU18
Manufacturer LOGIC Devices Incorporated
File Size 184.87 KB
Description 16 x 16-bit Parallel Multiplier
Datasheet download datasheet LMU18 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LMU18 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier LMU18 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier DESCRIPTION The LMU18 is a high-speed, low power 16-bit parallel multiplier. The LMU18 is an 84-pin device which provides simultaneous access to all outputs. The LMU18 produces the 32-bit product of two 16-bit numbers. Data present at the A inputs, along with the TCA control bit, is loaded into the A register on the rising edge of CLK. B data and the TCB control bit are similarly loaded. Loading of the A and B registers is controlled by the ENA and ENB controls. When HIGH, these controls prevent application of the clock to the respective register. The TCA and TCB controls specify the operands as two’s complement when HIGH, or unsigned magnitude when LOW.