LMU18 Datasheet PDF - LOGIC Devices Incorporated 16 x 16-bit Parallel Multiplier Specs

LMU18 - 16 x 16-bit Parallel Multiplier

Datasheet Summary

Description

The LMU18 is a high-speed, low power 16-bit parallel multiplier.

The LMU18 is an 84-pin device which provides simultaneous access to all outputs.

The LMU18 produces the 32-bit product of two 16-bit numbers.

Features

u 35 ns Worst-Case Multiply Time u Low Power CMOS Technology u Full 32-bit Output Port.
No Multiplexing Required u Two’s Complement, Unsigned, or Mixed Operands u Three-State Outputs u 84-pin PLCC, J-Lead LMU18 BLOCK.

Datasheet Details

Part number	LMU18
Manufacturer	LOGIC Devices Incorporated
File Size	184.87 KB
Description	16 x 16-bit Parallel Multiplier
Datasheet	LMU18 Datasheet
Additional preview pages of the LMU18 datasheet.

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Full PDF Text Transcription

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LMU18 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier LMU18 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier DESCRIPTION The LMU18 is a high-speed, low power 16-bit parallel multiplier. The LMU18 is an 84-pin device which provides simultaneous access to all outputs. The LMU18 produces the 32-bit product of two 16-bit numbers. Data present at the A inputs, along with the TCA control bit, is loaded into the A register on the rising edge of CLK. B data and the TCB control bit are similarly loaded. Loading of the A and B registers is controlled by the ENA and ENB controls. When HIGH, these controls prevent application of the clock to the respective register. The TCA and TCB controls specify the operands as two’s complement when HIGH, or unsigned magnitude when LOW.

Published: Apr 25, 2005 |