MACH5

Manufacturer: Lattice

MACH5 datasheet by Lattice.

MACH5 Datasheet Details

Part number	MACH5
Datasheet	MACH5_LatticeSemiconductor.pdf
File Size	1.12 MB
Manufacturer	Lattice
Description	Fifth Generation MACH Architecture

The MACH® 5 family consists of a broad range of high-density and high-.

128 to 512 macrocell densities
68 to 256 I/Os Wide selection of density and I/O binations to support most application needs
6 macrocell density options
7 I/O options
Up to 4 I/O options per macrocell density
Up to 5 density & I/O options for each package Performance features to ﬁt system needs
5.5 ns tPD mercial, 7.5 ns tPD Industrial
182 MHz fCNT
Four programmable power/speed settings per block Flexible architecture facilitates logic design
Multiple levels of switch matrices allow for performance-based routing

Part Number	Description
MACH1	High-Performance EE CMOS Programmable Logic
MACH110-12	High-Density EE CMOS Programmable Logic
MACH110-15	High-Density EE CMOS Programmable Logic
MACH110-20	High-Density EE CMOS Programmable Logic
MACH120-12	High-Performance EE CMOS Programmable Logic
MACH120-15	High-Performance EE CMOS Programmable Logic
MACH130-15	High-Density EE CMOS Programmable Logic
MACH130-20	High-Density EE CMOS Programmable Logic
MACH2	High-Performance EE CMOS Programmable Logic
MACH210-12	High-Density EE CMOS Programmable Logic