2096VL Overview
The ispLSI 2096VL is a High Density Programmable Logic Device containing 96 Registers, six Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides plete interconnectivity between all of these elements.
2096VL Key Features
- SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC
- 4000 PLD Gates
- 96 I/O Pins, Six Dedicated Inputs
- 96 Registers
- High Speed Global Interconnect
- Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc
- Small Logic Block Size for Random Logic
- 100% Functional, JEDEC and Pinout patible with ispLSI 2096V and 2096VE Devices
- 2.5V LOW VOLTAGE 2096 ARCHITECTURE
- Interfaces with Standard 3.3V Devices (Inputs and I/Os are 3.3V Tolerant)