MX25L12850F
MX25L12850F is CMOS MXSMIO RPMC FLASH MEMORY manufactured by Macronix.
FEATURES
3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) RPMC FLASH MEMORY
GENERAL
- Supports Serial Peripheral Interface -- Mode 0 and Mode 3
- Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
- 128Mb: 134,217,728 x 1 bit structure or 67,108,864 x 2 bits (two I/O mode) structure or 33,554,432 x 4 bits (four
I/O mode) structure
- Protocol Support
- Single I/O, Dual I/O and Quad I/O
- Latch-up protected to 100m A from -1V to Vcc +1V
- Fast read for SPI mode
- Support fast clock frequency for read operation as 104MHz
- Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions
- Default Quad I/O enable (QE bit=1), and can not be change
- Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each
- Any Block can be erased individually
- Programming :
- 256byte page buffer
- Quad Input/Output page program(4PP) to enhance program performance
- Typical 100,000 erase/program cycles
- 20 years data retention
RPMC FEATURES
- Support Replay Protection Monotonic Counter (RPMC)
- Four 32-bit Monotonic counters
- Volatile HMAC Key register
- Non-volatile Root Key register RPMC related information is available at https://downloadcenter.intel./Detail_Desc.aspx?agr=Y&Dwnld ID=22646
SOFTWARE FEATURES
- Input Data Format
- 1-byte mand code
- Block lock protection
- The BP0-BP3 and T/B status bit defines the size of the area to be protection against program and erase instructions
- Additional 4K bit security OTP
- Features unique identifier
- factory locked identifiable, and customer lockable
- mand Reset
- Program/Erase Suspend and Resume operation
- Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES mand for 1-byte Device...
