MAX3881 Datasheet | Maxim Integrated

19-1996; Rev 1; 12/01 KIT ATION EVALU E L B AVAILA +3.3V, 2.488Gbps, SDH/SONET 1:16 Deserializer with Clock Recovery General Description Features o Single +3.3V Supply o 530m W Operating Power o Fully Integrated Clock Recovery and Data Retiming o Exceeds ANSI, ITU, and Bellcore Specifications o Additional High-Speed Input Facilitates System Loopback Diagnostic Testing o 2.488Gbps Serial to 155Mbps Parallel Conversion o Differential PECL Clock Output o Single-Ended PECL Data Outputs o Tolerates >2000 Consecutive Identical Digits o Loss-of-Lock Indicator The MAX3881 deserializer with clock recovery is ideal for converting 2.488Gbps serial data to 16-bit-wide, 155Mbps parallel data for SDH/SONET applications. Operating from a single +3.3V supply, this device accepts high-speed serial-data inputs and delivers single-ended PECL parallel data outputs and a differential PECL parallel clock output for interfacing with digital .. circuitry. The MAX3881 includes a low-power clock recovery and data retiming function for 2.488Gbps applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input; the signal is then retimed by the recovered clock. The MAX3881’s jitter performance exceeds all SDH/SONET specifications. An additional 2.488Gbps serial input is available for system loopback diagnostic testing. The device also includes a TTL-patible loss-of-lock (LOL) monitor. The MAX3881 is available in the extended temperature range (-40°C to +85°C) in a 64-pin TQFP-EP package. Ordering Information PART MAX3881ECB - Exposed pad TEMP. RANGE -40°C to +85°C PIN-PACKAGE 64 TQFP-EP- Applications PD15 PD14 GND GND LOL VCC VCC Pin Configuration TOP VIEW PD13 PD12 PD11 GND GND VCC VCC VCC VCC 2.488Gbps SDH/SONET Transmission Systems Add/Drop Multiplexers Digital Cross-Connects 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 GND FIL+ FILVCC PHADJ+ PHADJVCC SDI+ SDIVCC SLBI+ SLBIVCC SIS GND...