MAX3886 Datasheet | Maxim Integrated

19-3103; Rev 0; 12/07 Multirate CDR with Integrated Serializer/Deserializer for GPON and BPON ONT Applications General Description The MAX3886 2.488Gbps/1.244Gbps/622Mbps CDR with Ser Des (serializer/deserializer) is designed specifically for low-cost optical network terminal (ONT) applications in Gigabit passive optical network (GPON) and broadband passive optical network (BPON) fiber-tothe-home (FTTH) systems. It provides G.984- and G.983-pliant clock and data recovery (CDR) for the .. continuous downstream data signal, with an integrated 4-bit Ser Des that has LVDS parallel interfaces and CML serial interfaces. The Ser Des uses the recovered downstream clock for upstream serialization (loopback clock), providing optimum PON operation. The CDR frequency reference can be provided by a low-cost 19.44MHz SMD-type crystal or external LVCMOS source, and excellent jitter tolerance supports applications requiring FEC. An integrated burst-enable signal path also simplifies highperformance upstream burst timing. This 3.3V IC is housed in a 8mm x 8mm, 56-lead thin QFN package and operates from -40°C to +85°C. Features - 2.488Gbps, 1.244Gbps, and 622Mbps Clock and Data Recovery - Meets G.984 and G.983 Jitter Requirements - 4-Bit Serializer and 4-Bit Deserializer with Loop-Timed Serialization - CML Serial I/O, LVDS Parallel I/O - Integrated Reference Oscillator Uses 19.44MHz SMD Crystal - Integrated Upstream Burst-Enable Signal Path Ordering Information PART MAX3886ETN+ TEMP RANGE -40°C to +85°C PINPACKAGE 56 TQFN (8mm x 8mm) PKG CODE T5688-2 +Denotes a lead-free package. Applications BPON/GPON Optical Network Terminal (ONT) Pin Configuration appears at end of data sheet. Typical Application Circuit +3.3V +3.3V 0.27μF VCC RFCK1 19.4400MHz MAX3747/ 2.488G MAX3748 LIM AMP 1310nm MAX3643/ MAX3656 LD DRIVER RFCK2 SDI CFIL VCC MVCO MDDR MSYM MAC IC +3.3V VOICE SLIC GPON CDR/SERDES PCLK (311MHz) PDATA (622Mbps) PDATA (311Mbps) PCLK...