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MAX3882A - 2.488Gbps 1:4 Demultiplexer

General Description

The MAX3882A is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps serial data to 4-bit-wide, 622Mbps parallel data for SDH/SONET applications.

Key Features

  • No Reference Clock Required for Data Acquisition.
  • Serial Input Rate: 2.488Gbps.
  • Fully Integrated Clock and Data Recovery with Limiting Amplifier and 1:4 Demultiplexer.
  • Parallel Output Rate: 622Mbps.
  • Differential Input Range: 10mVP-P to 1.6VP-P without Threshold Adjust.
  • Differential Input Range: 50mVP-P to 600mVP-P with Threshold Adjust.
  • 0.65UI High-Frequency Jitter Tolerance.
  • Loss-of-Lock (LOL) Indicator.
  • Wide Inpu.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-2718; Rev 2; 4/09 www.DataSheet4U.com 2.488Gbps 1:4 Demultiplexer with Clock and Data Recovery and Limiting Amplifier General Description The MAX3882A is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps serial data to 4-bit-wide, 622Mbps parallel data for SDH/SONET applications. The device accepts serial NRZ input data as low as 10mVP-P of 2.488Gbps and generates four parallel LVDS data outputs at 622Mbps. Included is an additional high-speed serial data input for system loopback diagnostic testing. For data acquisition, the MAX3882A does not require an external reference clock.